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Analysis of Operator's Visual Process Using a Cognitive Information Processing Model

Jin Yinhua,Li Zhenye,Gu Hui,Tang Yiping

Strategic Study of CAE 2007, Volume 9, Issue 5,   Pages 57-61

Abstract:  It consists of a perceptual processor, a cognitive processor, a motor processor and a short-termdecided by characteristic of panel information,  operator's factors,  and parameters of perceptualprocessor and so on.

Keywords： cognitive information processing model     perceptual processor     visual process     mental state     human errors    

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Exploring high-performance processor architecture beyond the exascale None

Xiang-hui XIE, Xun JIA

Frontiers of Information Technology & Electronic Engineering 2018, Volume 19, Issue 10,   Pages 1224-1229 doi: 10.1631/FITEE.1800424

Abstract: Then a high-performance many-core processor architecture with scalar processing and application-specific

Keywords： High-performance computing     Beyond the exascale     Processor architecture     Application-customized hardware    

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Structural design of morphing trailing edge actuated by SMA

Qi WANG, Zhiwei XU, Qian ZHU

Frontiers of Mechanical Engineering 2013, Volume 8, Issue 3,   Pages 268-275 doi: 10.1007/s11465-013-0261-y

Abstract:

In this paper, the morphing trailing edge is designed to achieve the up and down deflection under the aerodynamic load. After a detailed and accurate computational analysis to determine the SMA specifications and layout programs, a solid model is created in CATIA and the structures of the morphing wing trailing edge are produced by CNC machining. A set of DSP measurement and control system is designed to accomplish the controlling experiment of the morphing wing trailing edge. At last, via the force analysis, the trailing edge is fabricated with four sections of aluminum alloy, and the arrangement scheme of SMA wires is determined. Experiment of precise control integral has been performed to survey the control effect. The experiment consists of deflection angle tests of the third joint and the integral structure. Primarily, the ultimate deflection angle is tested in these two experiments. Therefore, the controlling experiment of different angles could be performed within this range. The results show that the deflection error is less than 4% and response time is less than 6.7 s, the precise controlling of the morphing trailing edge is preliminary realized.

Keywords： morphing wing trailing edge     shape memory alloy     digital signal processor     PID algorithm    

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Developing a power monitoring and protection system for the junction boxes of an experimental seafloor observatory network

Jun WANG,De-jun LI,Can-jun YANG,Zhi-feng ZHANG,Bo JIN,Yan-hu CHEN

Frontiers of Information Technology & Electronic Engineering 2015, Volume 16, Issue 12,   Pages 1034-1045 doi: 10.1631/FITEE.1500099

Abstract: A power monitoring and protection system based on an embedded processor was designed for the junction

Keywords： Power monitoring and protection     Embedded processor     Seafloor observatory network     IEEE 1588     Junction    

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Real-time simulation platform for photovoltaic system with a boost converter using MPPT algorithm in a DSP controller

Geethanjali PURUSHOTHAMAN, Vimisha VENUGOPALAN, Aleena Mariya VINCENT

Frontiers in Energy 2013, Volume 7, Issue 3,   Pages 373-379 doi: 10.1007/s11708-013-0272-8

Abstract: real-time simulation of a PV system with a boost converter was proposed using only the digital signal processor(DSP) processor with two DC voltage sources to emulate the temperature and irradiation in the PV system

Keywords： photovoltaic (PV) module     digital signal processor (DSP) controller     power electronic converter     real-time    

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Amultimodal dense convolution network for blind image quality assessment Research Article

Nandhini CHOCKALINGAM, Brindha MURUGAN

Frontiers of Information Technology & Electronic Engineering 2023, Volume 24, Issue 11,   Pages 1601-1615 doi: 10.1631/FITEE.2200534

Abstract: Technological advancements continue to expand the communications industry’s potential. Images, which are an important component in strengthening communication, are widely available. Therefore, image quality assessment (IQA) is critical in improving content delivered to end users. Convolutional neural networks (CNNs) used in IQA face two common challenges. One issue is that these methods fail to provide the best representation of the image. The other issue is that the models have a large number of parameters, which easily leads to overfitting. To address these issues, the dense convolution network (DSC-Net), a model with fewer parameters, is proposed for . Moreover, it is obvious that the use of multimodal data for has improved the performance of applications. As a result, fuses the texture features extracted using the gray-level co-occurrence matrix (GLCM) method and spatial features extracted using DSC-Net and predicts the image quality. The performance of the proposed framework on the benchmark synthetic datasets LIVE, TID2013, and KADID-10k demonstrates that the MDSC-Net approach achieves good performance over state-of-the-art methods for the NR-IQA task.

Keywords： quality assessment     Multimodal dense convolution network (MDSC-Net)     Deep learning     Visual quality     Perceptual    

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Schedule refinement for homogeneousmulti-core processors in the presence of manufacturing-caused heterogeneity

Zhi-xiang CHEN,Zhao-lin LI,Shan CAO,Fang WANG,Jie ZHOU

Frontiers of Information Technology & Electronic Engineering 2015, Volume 16, Issue 12,   Pages 1018-1033 doi: 10.1631/FITEE.1500035

Abstract: Multi-core homogeneous processors have been widely used to deal with computation-intensive embedded applications. However, with the continuous down scaling of CMOS technology, within-die variations in the manufacturing process lead to a significant spread in the operating speeds of cores within homogeneous multi-core processors. Task scheduling approaches, which do not consider such heterogeneity caused by within-die variations, can lead to an overly pessimistic result in terms of performance. To realize an optimal performance according to the actual maximum clock frequencies at which cores can run, we present a heterogeneity-aware schedule refining (HASR) scheme by fully exploiting the heterogeneities of homogeneous multi-core processors in embedded domains. We analyze and show how the actual maximum frequencies of cores are used to guide the scheduling. In the scheme, representative chip operating points are selected and the corresponding optimal schedules are generated as candidate schedules. During the booting of each chip, according to the actual maximum clock frequencies of cores, one of the candidate schedules is bound to the chip to maximize the performance. A set of applications are designed to evaluate the proposed scheme. Experimental results show that the proposed scheme can improve the performance by an average value of 22.2%, compared with the baseline schedule based on the worst case timing analysis. Compared with the conventional task scheduling approach based on the actual maximum clock frequencies, the proposed scheme also improves the performance by up to 12%.

Keywords： Schedule refining     Multi-core processor     Heterogeneity     Representative chip operating point    

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A simple digital control algorithm for three phase shunt active filter: simulation and experimentation

Subbaraman SRINATH, Chandan KUMAR, M. P. SELVAN

Frontiers in Energy 2014, Volume 8, Issue 1,   Pages 119-128 doi: 10.1007/s11708-013-0288-0

Abstract: A novel and simple control algorithm using digital signal processor (DSP) has been proposed and realized

Keywords： shunt active filter (SAF)     power quality     voltage source inverter (VSI)     digital signal processor (DSP)    

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Hardware Module of Multi-Protocol Tester Based on the Specification of 2.0 Mb/s High Speed Signalling link

Liu Zhihui

Strategic Study of CAE 2002, Volume 4, Issue 2,   Pages 79-85

Abstract: In order to ensure the quality of the analyzing set, the best embedded processor and newest real time

Keywords： 2.048 Mb/s high speed signalling link     embedded processor     real time operating system     protocol-analyzing    

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Issues on the Scalability in Designing a Massively Parallel Processor

Lu Xicheng

Strategic Study of CAE 2000, Volume 2, Issue 10,   Pages 105-109

Abstract:

The massively parallel processor (MPP) has been designed to meet the requirements for the high performance

Keywords： architecture     MPP     SMP     CC-NUMA     cluster     hypernode    

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Analog Optical Computing for Artificial Intelligence Review

Jiamin Wu,Xing Lin,Yuchen Guo,Junwei Liu,Lu Fang,Shuming Jiao,Qionghai Dai,

Engineering 2022, Volume 10, Issue 3,   Pages 133-145 doi: 10.1016/j.eng.2021.06.021

Abstract:

The rapid development of artificial intelligence (AI) facilitates various applications from all areas but also poses great challenges in its hardware implementation in terms of speed and energy because of the explosive growth of data. Optical computing provides a distinctive perspective to address this bottleneck by harnessing the unique properties of photons including broad bandwidth, low latency, and high energy efficiency. In this review, we introduce the latest developments of optical computing for different AI models, including feedforward neural networks, reservoir computing, and spiking neural networks (SNNs). Recent progress in integrated photonic devices, combined with the rise of AI, provides a great opportunity for the renaissance of optical computing in practical applications. This effort requires multidisciplinary efforts from a broad community. This review provides an overview of the state-of-the-art accomplishments in recent years, discusses the availability of current technologies, and points out various remaining challenges in different aspects to push the frontier. We anticipate that the era of large-scale integrated photonics processors will soon arrive for practical AI applications in the form of hybrid optoelectronic frameworks.

Keywords： computing     Opto-electronic framework     Neural network     Neuromorphic computing     Reservoir computing     Photonics processor    

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Design of Real-time Video Processing System Based onMultimedia Processor TMS320DM642

Zhao Zhen,Zhang Weining,Tian Honglei

Strategic Study of CAE 2007, Volume 9, Issue 3,   Pages 87-91

Abstract:

A real-time video processing system based on multimedia processor TMS320DM642

Keywords： TMS320DM642     TVP5150     SAA7121     video port    

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A perceptual and predictive batch-processing memory scheduling strategy for a CPU-GPU heterogeneous system Research Article

Juan FANG, Sheng LIN, Huijing YANG, Yixiang XU, Xing SU,fangjuan@bjut.edu.cn,lins@emails.bjut.edu.cn,yangkx@emails.bjut.edu.cn,xuyx@emails.bjut.edu.cn,suxing@bjut.edu.cn

Frontiers of Information Technology & Electronic Engineering 2023, Volume 24, Issue 7,   Pages 994-1006 doi: 10.1631/FITEE.2200449

Abstract: shared-memory resources in a architecture, and a shared-memory request scheduling strategy based on perceptual

Keywords： CPU-GPU heterogeneous     Multi-core     Unified memory     Access scheduling    

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Steering control for underwater gliders Article

You LIU, Qing SHEN, Dong-li MA, Xiang-jiang YUAN

Frontiers of Information Technology & Electronic Engineering 2017, Volume 18, Issue 7,   Pages 898-914 doi: 10.1631/FITEE.1601735

Abstract: Both processor-in-loop (PIL) simulations and in-lake tests are presented to validate our steering control

Keywords： system identification     Steering control     Adaptive control     Optimal control     Energy saving control     Processor-in-loop    

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Title Author Date Type Operation

Analysis of Operator's Visual Process Using a Cognitive Information Processing Model

Jin Yinhua,Li Zhenye,Gu Hui,Tang Yiping

Journal Article

Exploring high-performance processor architecture beyond the exascale

Xiang-hui XIE, Xun JIA

Journal Article

Structural design of morphing trailing edge actuated by SMA

Qi WANG, Zhiwei XU, Qian ZHU

Journal Article

Developing a power monitoring and protection system for the junction boxes of an experimental seafloor observatory network

Jun WANG,De-jun LI,Can-jun YANG,Zhi-feng ZHANG,Bo JIN,Yan-hu CHEN

Journal Article

Real-time simulation platform for photovoltaic system with a boost converter using MPPT algorithm in a DSP controller

Geethanjali PURUSHOTHAMAN, Vimisha VENUGOPALAN, Aleena Mariya VINCENT

Journal Article

Amultimodal dense convolution network for blind image quality assessment

Nandhini CHOCKALINGAM, Brindha MURUGAN

Journal Article

Schedule refinement for homogeneousmulti-core processors in the presence of manufacturing-caused heterogeneity

Zhi-xiang CHEN,Zhao-lin LI,Shan CAO,Fang WANG,Jie ZHOU

Journal Article

A simple digital control algorithm for three phase shunt active filter: simulation and experimentation

Subbaraman SRINATH, Chandan KUMAR, M. P. SELVAN

Journal Article

Hardware Module of Multi-Protocol Tester Based on the Specification of 2.0 Mb/s High Speed Signalling link

Liu Zhihui

Journal Article

Issues on the Scalability in Designing a Massively Parallel Processor

Lu Xicheng

Journal Article

Analog Optical Computing for Artificial Intelligence

Jiamin Wu,Xing Lin,Yuchen Guo,Junwei Liu,Lu Fang,Shuming Jiao,Qionghai Dai,

Journal Article

Design of Real-time Video Processing System Based onMultimedia Processor TMS320DM642

Zhao Zhen,Zhang Weining,Tian Honglei

Journal Article

A perceptual and predictive batch-processing memory scheduling strategy for a CPU-GPU heterogeneous system

Juan FANG, Sheng LIN, Huijing YANG, Yixiang XU, Xing SU,fangjuan@bjut.edu.cn,lins@emails.bjut.edu.cn,yangkx@emails.bjut.edu.cn,xuyx@emails.bjut.edu.cn,suxing@bjut.edu.cn

Journal Article

Steering control for underwater gliders

You LIU, Qing SHEN, Dong-li MA, Xiang-jiang YUAN

Journal Article